Baud Rate Generation; Table 58. Baud Rate Deviation Error Calculation - Ck_Uart = 40 Mhz; Figure 182. Uart Clock Ck_Uart And Data Frame Timing - Holtek HT32F54231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F54231/HT32F54241/HT32F54243/HT32F54253

Baud Rate Generation

The baud rate for the UART receiver and transmitter are both set with the same values. The baud rate
divisor, BRD, has the following relationship with the UART clock which is known as CK_UART.
Where the CK_UART clock is the APB clock connected to the UART while the BRD range is from
16 to 65535.
CK_UART
Reference
Divisor Clock

Figure 182. UART Clock CK_UART and Data Frame Timing

Table 58. Baud Rate Deviation Error Calculation – CK_UART = 40 MHz
Baud Rate
No.
1
2
3
4
5
6
7
8
9
10
Rev. 1.00
Baud Rate Clock = CK_UART / BRD
BRD = 18
Start Bit Bit0 Bit1 Bit2
Kbps
2.4
9.6
19.2
57.6
115.2
230.4
460.8
921.6
2250
3000
496 of 576
Parity Bit
Bit3 Bit4 Bitn
n = 7 ~ 8
CK_UART = 40 MHz
Actual BRD
2.4 16667
9.6 4167
19.2 2083
57.6 694
115.3 347
229.9 174
459.8 87
930.2 43
2222.2 18
— —
Next Start
Stop Bit
Bit
Deviation
Error Rate
0.00%
-0.01%
0.02%
0.06%
0.06%
-0.22%
-0.22%
0.94%
-1.23%
—
January 28, 2022