Holtek HT32F54231 User Manual page 521

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F54231/HT32F54241/HT32F54243/HT32F54253
Bits Field
[26], [21], BEIEn
[16], [11],
[6], [1]
[25], [20], GEIEn
[15], [10],
[5], [0]
Rev. 1.00
Descriptions
Channel n Block Transaction End Interrupt Enable control (n = 0 ~ 5)
0: Block Transaction End interrupt is disabled
1: Block Transaction End interrupt is enabled
This bit is set and cleared by software.
Channel n Global Transfer Event Interrupt Enable control (n = 0 ~ 5)
0: Global Transfer Event interrupt is disabled
1: Global Transfer Event interrupt is enabled
This bit is set and cleared by software.
521 of 576 January 28, 2022