Holtek HT32F54231 User Manual page 260

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F54231/HT32F54241/HT32F54243/HT32F54253
Bits Field
[17:16] CH3CCS
[3:0] TI3F
Rev. 1.00
Descriptions
Channel 3 Capture/Compare Selection
00: Channel 3 is configured as an output
01: Channel 3 is configured as an input derived from the TI3 signal
10: Channel 3 is configured as an input derived from the TI2 signal
11: Channel 3 is configured as an input which comes from the TRCED signal
derived from the Trigger Controller
Note: The CH3CCS field can be accessed only when the CH3E bit is cleared to 0.
Channel 3 Input Source TI3 Filter Setting
These bits define the frequency divided ratio used to sample the TI3 signal. The
Digital filter in the GPTM is an N-event counter where N is defined as how many
valid transitions are necessary to output a filtered signal.
0000: No filter, the sampling clock is f
0001: f = f , N = 2
sampling CLKIN
0010: f = f , N = 4
sampling CLKIN
0011: f = f , N = 8
sampling CLKIN
0100: f = f / 2, N = 6
sampling DTS
0101: f = f / 2, N = 8
sampling DTS
0110: f = f / 4, N = 6
sampling DTS
0111: f = f / 4, N = 8
sampling DTS
1000: f = f / 8, N = 6
sampling DTS
1001: f = f / 8, N = 8
sampling DTS
1010: f = f / 16, N = 5
sampling DTS
1011: f = f / 16, N = 6
sampling DTS
1100: f = f / 16, N = 8
sampling DTS
1101: f = f / 32, N = 5
sampling DTS
1110: f = f / 32, N = 6
sampling DTS
1111: f = f / 32, N = 8
sampling DTS
260 of 576
SYSTEM
January 28, 2022