Holtek HT32F54231 User Manual page 10

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F54231/HT32F54241/HT32F54243/HT32F54253
Channel 0 Asymmetric Compare Register - CH0ACR ................................................................. 364
Channel 1 Asymmetric Compare Register - CH1ACR ................................................................. 364
Channel 2 Asymmetric Compare Register - CH2ACR ................................................................. 365
Channel 3 Asymmetric Compare Register - CH3ACR ................................................................. 365
16 Single-Channel Timer (SCTM) ......................................................................... 366
Introduction ........................................................................................................................ 366
Features ............................................................................................................................. 367
Functional Descriptions ..................................................................................................... 367
Counter Mode ............................................................................................................................... 367
Clock Controller ............................................................................................................................ 368
Trigger Controller .......................................................................................................................... 369
Slave Controller ............................................................................................................................ 370
Channel Controller ........................................................................................................................ 372
Input Stage ................................................................................................................................... 374
Output Stage ................................................................................................................................. 375
Update Management .................................................................................................................... 377
Register Map ..................................................................................................................... 378
Register Descriptions ......................................................................................................... 379
Timer Counter Configuration Register - CNTCFR ....................................................................... 379
Timer Mode Configuration Register - MDCFR ............................................................................. 380
Timer Trigger Configuration Register - TRCFR ............................................................................ 381
Timer Control Register - CTR ...................................................................................................... 382
Channel Input Configuration Register - CHICFR ......................................................................... 383
Channel Output Configuration Register - CHOCFR .................................................................... 385
Channel Control Register - CHCTR ............................................................................................. 386
Channel Polarity Configuration Register - CHPOLR .................................................................... 387
Timer Interrupt Control Register - DICTR .................................................................................... 388
Timer Event Generator Register - EVGR ..................................................................................... 389
Timer Interrupt Status Register - INTSR ...................................................................................... 390
Timer Counter Register - CNTR................................................................................................... 391
Timer Prescaler Register - PSCR ................................................................................................ 391
Timer Counter-Reload Register - CRR ........................................................................................ 392
Channel Capture/Compare Register - CHCCR ........................................................................... 393
17 Basic Function Timer (BFTM) .......................................................................... 394
Introduction ........................................................................................................................ 394
Features ............................................................................................................................. 394
Functional Description ....................................................................................................... 395
Repetitive Mode ............................................................................................................................ 395
One Shot Mode ............................................................................................................................. 396
Trigger ADC Start ......................................................................................................................... 396
Register Map ..................................................................................................................... 397
Register Descriptions ......................................................................................................... 397
Rev. 1.00 10 of 576 January 28, 2022