32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F54231/HT32F54241/HT32F54243/HT32F54253
Channel Output Reference Signal
When the MCTM is used in the compare match output mode, the CHxOREF signal (Channel x
Output Reference signal) is defined by the CHxOM field setup. The CHxOREF signal has several
types of output function which defines what happens to the output when the counter value matches
the contents of the CHxCCR register. In addition to the low, high and toggle CHxOREF output
types; there are also PWM mode 1 and PWM mode 2 outputs. In these modes, the CHxOREF
signal level is changed according to the count direction and the relationship between the counter
value and the CHxCCR content. There are also two modes which will force the output into an
inactive or active state irrespective of the CHxCCR content or counter values. With regard to
a more detailed description refer to the relative bit definition. The accompanying table shows a
summary of the output type setup.
Table 35. Compare Match Output Setup
Figure 93. Toggle Mode Channel Output Reference Signal – CHxPRE = 0
Rev. 1.00
CHxOM Value
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
Counter Value
CRR
CHxCCR
(New value 2)
CHxCCR
(New value 3)
CHxCCR
(New value 1)
CHxCCR
Update
CHxCCR value
(1)
TME
CHxOREF
UEV1
(Update Event 1)
302 of 576
Compare Match Level
No change
Clear Output to 0
Set Output to 1
Toggle Output
Force Inactive Level
Force Active Level
PWM Mode 1
PWM Mode 2
CHxOM=0x3, CHxPRE=0
(Output toggle, preload disable)
(2)
(3)
Time
January 28, 2022
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