Alternate Function; Lock Mechanism; Register Map; Table 23. Afio Selection For Peripheral Map Example - Holtek HT32F54231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F54231/HT32F54241/HT32F54243/HT32F54253

Alternate Function

Up to sixteen alternative functions can be chosen for each I/O pad by setting the PxCFGn [3:0]
field in the GPxCFGLR or GPxCFGHR (n = 0 ~ 15, x = A ~ D) registers. If the pin is selected as
unavailable item which is noted as "N/A" in the "Alternate Function Mapping" table of the device
datasheet, this pin will be defined as default alternate function. Refer to the "Alternate Function
Mapping" table in the device datasheet for detailed mapping of the alternate function I/O pins.
In addition to this flexible I/O multiplexing architecture, each peripheral has alternate functions
mapped onto different I/O pins to optimize the number of peripherals available in smaller packages.
The following description shows the setting of the PxCFGn [3:0] field.
PxCFGn [3:0] = 0000: The default alternated function (after reset, AF0)
▆
PxCFGn [3:0] = 0001: Alternate Function 1 (AF1)
▆
PxCFGn [3:0] = 0010: Alternate Function 2 (AF2)
▆
.......
▆
PxCFGn [3:0] = 1110: Alternate Function 14 (AF14)
▆
PxCFGn [3:0] = 1111: Alternate Function 15 (AF15)
▆

Table 23. AFIO Selection for Peripheral Map Example

AF0 AF1 AF2 AF3
System
GPIO ADC CMP
Default
Note: CMP is only available for the HT32F54243/HT32F54253 devices.

Lock Mechanism

The device also offers a lock function to lock the AFIO configuration using the GPIO lock register,
PxLOCKR (x = A ~ D), until a reset event occurs. Refer to the GPIO Locking Mechanism section
in the GPIO chapter for more details.

Register Map

The following table shows the AFIO registers and reset values.

Table 24. AFIO Register Map

Register
ESSR0
ESSR1
GPACFGLR
GPACFGHR
GPBCFGLR
GPBCFGHR
GPCCFGLR
GPCCFGHR
GPDCFGLR
GPDCFGHR
Rev. 1.00
AF4 AF5 AF6 AF7 AF8 AF9 AF10 AF11 AF12
MCTM USART
SPI I 2 C
/ GPTM / UART
Offset
0x000 EXTI Source Selection Register 0
0x004 EXTI Source Selection Register 1
0x020 GPIO Port A Configuration Low Register
0x024 GPIO Port A Configuration High Register
0x028 GPIO Port B Configuration Low Register
0x02C GPIO Port B Configuration High Register
0x030 GPIO Port C Configuration Low Register
0x034 GPIO Port C Configuration High Register
0x038 GPIO Port D Configuration Low Register
0x03C GPIO Port D Configuration High Register
170 of 576
N/A N/A N/A N/A TKEY SCTM LEDC
Description
AF13 AF14 AF15
System
Other
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
January 28, 2022