Register Map; Table 64. Pdma Register Map - Holtek HT32F54231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F54231/HT32F54241/HT32F54243/HT32F54253

Register Map

The following table shows the PDMA registers and reset values.

Table 64. PDMA Register Map

Register
PDMA Channel 0 Registers
PDMACH0CR
PDMACH0SADR
PDMACH0DADR
PDMACH0TSR
PDMACH0CTSR
PDMA Channel 1 Registers
PDMACH1CR
PDMACH1SADR
PDMACH1DADR
PDMACH1TSR
PDMACH1CTSR
PDMA Channel 2 Registers
PDMACH2CR
PDMACH2SADR
PDMACH2DADR
PDMACH2TSR
PDMACH2CTSR
PDMA Channel 3 Registers
PDMACH3CR
PDMACH3SADR
PDMACH3DADR
PDMACH3TSR
PDMACH3CTSR
PDMA Channel 4 Registers
PDMACH4CR
PDMACH4SADR
PDMACH4DADR
PDMACH4TSR
PDMACH4CTSR
PDMA Channel 5 Registers
PDMACH5CR
PDMACH5SADR
PDMACH5DADR
PDMACH5TSR
PDMACH5CTSR
PDMA Global Register
PDMAISR
PDMAISCR
PDMAIER
Rev. 1.00
Offset
0x000 PDMA Channel 0 Control Register
0x004 PDMA Channel 0 Source Address Register
0x008 PDMA Channel 0 Destination Address Register
0x010 PDMA Channel 0 Transfer Size Register
0x014 PDMA Channel 0 Current Transfer Size Register
0x018 PDMA Channel 1 Control Register
0x01C PDMA Channel 1 Source Address Register
0x020 PDMA Channel 1 Destination Address Register
0x028 PDMA Channel 1 Transfer Size Register
0x02C PDMA Channel 1 Current Transfer Size Register
0x030 PDMA Channel 2 Control Register
0x034 PDMA Channel 2 Source Address Register
0x038 PDMA Channel 2 Destination Address Register
0x040 PDMA Channel 2 Transfer Size Register
0x044 PDMA Channel 2 Current Transfer Size Register
0x048 PDMA Channel 3 Control Register
0x04C PDMA Channel 3 Source Address Register
0x050 PDMA Channel 3 Destination Address Register
0x058 PDMA Channel 3 Transfer Size Register
0x05C PDMA Channel 3 Current Transfer Size Register
0x060 PDMA Channel 4 Control Register
0x064 PDMA Channel 4 Source Address Register
0x068 PDMA Channel 4 Destination Address Register
0x070 PDMA Channel 4 Transfer Size Register
0x074 PDMA Channel 4 Current Transfer Size Register
0x078 PDMA Channel 5 Control Register
0x07C PDMA Channel 5 Source Address Register
0x080 PDMA Channel 5 Destination Address Register
0x088 PDMA Channel 5 Transfer Size Register
0x08C PDMA Channel 5 Current Transfer Size Register
0x120 PDMA Interrupt Status Register
0x128 PDMA Interrupt Status Clear Register
0x130 PDMA Interrupt Enable Register
511 of 576
Description Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
January 28, 2022