32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F54231/HT32F54241/HT32F54243/HT32F54253
1/N frame = 64 clocks
(DTYNUM = 3), N = 4
CK_LED
Scanning
Frequency
SEGx
SEGxPOL = 0
C0Sx
(x = 0, 1, ..., 7)
COM Duty = 59 clocks
Dead time Duty
= 5 clocks
(DEADNUM = 0x05)
COM0
COM5
COM7
COMyPOL = 1
(y = 0, 5 ~ 7)
Figure 191. Common Cathode 8-segment Digital Display Timing
Common Anode 8-segment Digital Display + NPN BJT Connection
SEGx output low and COMy output high → LED on
▆
COMy output low → LED off
▆
Due to the I/O drive capability limitation, an external transistor is needed to increase the current
drive capability if using this connection method.
The register configurations are as follows:
Set SEGxPOL = 1 and COMyPOL = 1, the output is inverted.
▆
Set DTYNUM[1:0] = b11, the period of each digital display scan is 64 CK_LED clocks.
▆
The selected COMs are enabled.
▆
Figure 192. Common Anode 8-segment Digital Display + NPN BJT Connection
Rev. 1.00
1 Frame
.
.
.
C5Sx
V
DD
COMy
(y = 0, 5 ~ 7)
SEG0
SEG1
SEG2
SEG3
534 of 576
.
.
.
R
SEG4
SEG5
SEG6
SEG7
.
.
.
C7Sx
January 28, 2022
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