Apb Configuration Register - Apbcfgr - Holtek HT32F54231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F54231/HT32F54241/HT32F54243/HT32F54253
APB Configuration Register – APBCFGR
This register specifies the ADC conversion clock frequency.
Offset: 0x028
Reset value: 0x0001_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits Field
[18:16] ADCDIV
Rev. 1.00
30 29 28
22 21 20
Reserved
14 13 12
6 5 4
Descriptions
ADC Clock Frequency Division Selection
000: CK_ADC = CK_AHB
001: CK_ADC = CK_AHB / 2
010: CK_ADC = CK_AHB / 4
011: CK_ADC = CK_AHB / 8
100: CK_ADC = CK_AHB / 16
101: CK_ADC = CK_AHB / 32
110: CK_ADC = CK_AHB / 64
111: CK_ADC = CK_AHB / 3
Set and reset by software to control the ADC conversion clock division factor.
99 of 576
27 26
Reserved
19 18
ADCDIV
RW 0 RW
11 10
Reserved
3 2
Reserved
25 24
17 16
0 RW 1
9 8
1 0
January 28, 2022