ST STM32G4 Series Reference Manual page 327

Advanced arm-based 32-bit mcus
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RM0440
Bits 31:30 ADC345SEL[1:0]: ADC3/4/5 clock source selection
These bits are set and cleared by software to select the clock source used by the ADC345
interface.
Bits 29:28 ADC12SEL[1:0]: ADC1/2 clock source selection
Bits 27:26 CLK48SEL[1:0]: 48 MHz clock source selection
Bits 25:24 FDCANSEL[1:0] clock source selection
These bits are set and cleared by software to select the FDCAN clock source.
Bits 23:22 I2S23SEL[1:0]: clock source selection
These bits are set and cleared by software to select the I2S23 clock source.
Bits 21:20 SAI1SEL[1:0]: clock source selection
These bits are set and cleared by software to select the SAI clock source.
Bits 19:18 LPTIM1SEL[1:0]: Low power timer 1 clock source selection
00: No clock selected
01: PLL "P" clock selected as ADC345 clock
10: System clock selected as ADC3/4/5 clock
11: Reserved.
These bits are set and cleared by software to select the clock source used by the ADC
interface.
00: No clock selected
01: PLL "P" clock selected as ADC1/2 clock
10: System clock selected as ADC1/2 clock
11: Reserved
These bits are set and cleared by software to select the 48 MHz clock source used by USB
device FS and RNG.
00: HSI48 clock selected as 48 MHz clock
01: Reserved
10: PLL "Q" clock (PLL48M1CLK) selected as 48 MHz clock
11: Reserved, must be kept at reset value
00: HSE clock selected as FDCAN clock
01: PLL "Q" clock selected as FDCAN clock
10: PCLK clock selected as FDCAN clock
11: Reserved, must be kept at reset value.
00: System clock selected as I2S23 clock
01: PLL "Q" clock selected as I2S23 clock
10: Clock provided on I2S_CKIN pin is selected as I2S23 clock
11: HSI16 clock selected as I2S23 clock.
00: System clock selected as SAI clock
01: PLL "Q" clock selected as SAI clock
10: Clock provided on I2S_CKIN pin selected as SAI clock
11: HSI16 clock selected as SAI clock
These bits are set and cleared by software to select the LPTIM1 clock source.
00: PCLK selected as LPTIM1 clock
01: LSI clock selected as LPTIM1 clock
10: HSI16 clock selected as LPTIM1 clock
11: LSE clock selected as LPTIM1 clock
RM0440 Rev 4
Reset and clock control (RCC)
327/2126
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