Vic Input Register (Vicin); Vic Input Register (Vicin) Field Descriptions - Texas Instruments TMS320C64x DSP Reference Manual

VIC Port Registers
6.5.2

VIC Input Register (VICIN)

The DSP writes the input bits for VCXO interpolated control in the VIC input
register (VICIN). The DSP decides how often to update VICIN. The DSP can
write to VICIN only when the GO bit in the VIC control register (VICCTL) is set
to 1. The VIC module uses the MSBs of VICIN for precision values less than
16. The VICIN is shown in Figure 6–4 and described in Table 6–5.
Figure 6–4. VIC Input Register (VICIN)
31
15
Legend: R = Read only; R/W = Read/Write; -n = value after reset
Table 6–5. VIC Input Register (VICIN) Field Descriptions
Bit Field symval
31–16 Reserved –
15–0 VICINBITS OF(value)
† For CSL implementation, use the notation VIC_VICIN_VICINBITS_symval
6-8 VCXO Interpolated Control Port
Reserved
R-0
VICINBITS
R/W-0
†
Value Description
0 Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
0–FFFFh The DSP writes the input bits for VCXO interpolated control
to the VIC input bits.
16
0
SPRU629