Video Port Pin Interrupt Clear Register (Piclr) - Texas Instruments TMS320C64x DSP Reference Manual

5.1.12 Video Port Pin Interrupt Clear Register (PICLR)

The video port pin interrupt clear register (PICLR) is shown in Figure 5–12 and
described in Table 5–13. PICLR is an alias of the video port pin interrupt status
register (PISTAT) for writes only. Writing a 1 to a bit of PICLR clears the corre-
sponding bit in PISTAT. Writing a 0 has no effect. Register reads return all 0s.
Figure 5–12. Video Port Pin Interrupt Clear Register (PICLR)
31
23 22
Reserved PICLR22
R-0 W-0
15 14
PICLR15 PICLR14
W-0 W-0
7 6
PICLR7 PICLR6
W-0 W-0
Legend: R = Read only; W = Write only; -n = value after reset
SPRU629
Reserved
R-0
21 20
PICLR21 PICLR20 PICLR19
W-0 W-0
13 12
PICLR13 PICLR12 PICLR11
W-0 W-0
5 4
PICLR5 PICLR4 PICLR3
W-0 W-0
19 18 17
PICLR18 PICLR17
W-0 W-0 W-0
11 10
PICLR10 PICLR9
W-0 W-0 W-0
3 2
PICLR2 PICLR1
W-0 W-0 W-0
General Purpose I/O Operation
GPIO Registers
24
16
PICLR16
W-0
9 8
PICLR8
W-0
1 0
PICLR0
W-0
5-25