Displaying Video In Bt.656 Or Y/C Mode - Texas Instruments TMS320C64x DSP Reference Manual

4.10 Displaying Video in BT.656 or Y/C Mode

In order to display video in the BT.656 or Y/C format, the following steps are
needed:
1) Set the frame size in VDFRMSZ. Set the number of lines per frame
2) Set the horizontal blanking in VDHBLNK. Specify the frame pixel counter
3) Set the V bit timing for field 1 in VDVBIT1. Specify the line where the V bit
4) If external VBLNK signal is needed, set the VBLNK start for field 1 in
5) Set the V bit timing for field 2 in VDVBIT2. Specify the line where the V bit
6) If external VBLNK signal is needed, set the VBLNK start for field 2 in
7) Set VDIMGSZn. Adjust the displayed image size by setting the HSIZE and
8) Set VDIMOFF. Adjust the displayed image offset within the active video
9) Set the F bit timing in VDFBIT. Specify the line where the F bit is cleared
10) If external FLD output is required, set the video display field 1 timing.
11) Set VDCLIP. Default values for video clipping are 16 for the lower clipping,
SPRU629
(FRMHIGHT) and the number of pixels per line (FRMWIDTH).
value where horizontal blanking starts (HBLNKSTART) and pixel location
where horizontal blanking stops (HBLNKSTOP).
is set (VBITSET1) and the line where the V bit is cleared (VBITCLR1).
VDVBLKS1. Specify the frame line (VBLNKYSTART1) and frame pixel
counter (VBLNKXSTART1) values for the pixel where VBLNK goes active
for field 1. Set the VBLNK end for field 1 in VDVBLKE1. Specify the frame
line (VBLNKYSTOP1) and frame pixel counter (VBLNKXSTOP1) values
for the pixel where VBLNK goes inactive for field 1.
is set (VBITSET2) and the line where the V bit is cleared (VBITCLR2).
VDVBLKS2. Specify the frame line (VBLNKYSTART2) and frame pixel
counter (VBLNKXSTART2) values for the pixel where VBLNK goes active
for field 2. Set the VBLNK end for field 2 in VDVBLKE2. Specify the frame
line (VBLNKYSTOP2) and frame pixel counter (VBLNKXSTOP2) values
for the pixel where VBLNK goes inactive for field 2.
VSIZE bits.
area (by setting HOFFSET and VOFFSET).
(FBITCLR) and the line where the F bit is set (FBITSET).
Specify the line and pixel where FLD goes inactive (VDFLDT1). Set the
video display field 2 timing. Specify the line and pixel where FLD goes
active (VDFLDT2).
235 for the higher clipping of the Y values, and 240 for the higher clipping
of the Cb and Cr values.

Displaying Video in BT.656 or Y/C Mode

Video Display Port 4-47