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3.4 BT.656 and Y/C Mode Field and Frame Operation
Because DMAs are used to transfer data from the capture FIFOs to memory,
there is a large amount of flexibility in the way that capture fields and frames
are transferred and stored in memory. In some cases, for example a DMA
structure can be created to provide a set of ping-pong or round-robin memory
buffers to which a continuous stream of fields are stored without DSP interven-
tion. In other cases, the DSP may need to modify DMA pointer addresses after
each field or frame is captured. In some applications, only one field may be
captured and the other ignored completely, or a frame may need to be ignored
in order to have time to process a previous frame. The video port addresses
these issues by providing programmable control over different aspects of the
capture process.
3.4.1
Capture Determination and Notification
The video port treats the capture of every field as a separate operation. In order
to accommodate various capture scenarios, DMA structures, and processing
flows, the video port employs a flexible capture and DSP notification method.
This is programmed using the CON, FRAME, CF1, and CF2 bits in VCxCTL.
The CON bit controls the capture of multiple fields or frames. When CON = 1,
continuous capture is enabled, the video port captures incoming fields
(assuming the VCEN bit is set) without the need for DSP interaction. It relies
on a DMA structure with circular buffering capability to service the capture
FIFOs. When CON = 0, continuous capture is disabled, the video port sets a
field or frame capture complete bit (F1C, F2C, or FRMC) in VCxSTAT upon the
capture of each field as determined by the state of the other capture control
bits (FRAME, CF1, and CF2). Once the capture complete bit is set, at most,
one more field or frame can be received before capture operation is halted.
This prevents subsequent data from overwriting previous fields until the DSP
has a chance to update DMA pointers or process those fields. When a capture
halt occurs, the video port stops capturing data (for the halted field). It then
checks the appropriate capture complete bit at the start of each subsequent
field and resumes capture if the bit has been cleared.
The CON, FRAME, CF1, and CF2 bits encode the capture operations as listed
in Table 3–6.
SPRU629
BT.656 and Y/C Mode Field and Frame Operation
Video Capture Port
3-17
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