Video Capture Channel X Threshold Register (Vcathrld, Vcbthrld); Video Capture Channel X Threshold Register (Vcxthrld) Field Descriptions - Texas Instruments TMS320C64x DSP Reference Manual

Video Capture Registers
Figure 3–36. Video Capture Channel x Threshold Register (VCATHRLD, VCBTHRLD)
31
Reserved
R-0
15
Reserved
R-0
Legend: R = Read only; R/W = Read/Write; -n = value after reset
Table 3–21. Video Capture Channel x Threshold Register (VCxTHRLD) Field Descriptions
†
Bit field symval
31–26 Reserved –
25–16 VCTHRLD2 OF(value)
15–10 Reserved –
9–0 VCTHRLD1 OF(value)
† For CSL implementation, use the notation VP_VCxTHRLD_VCTHRLDn_symval
3-66 Video Capture Port
26 25
10 9
†
Value BT.656 or Y/C Mode Raw Data Mode
0 Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
0–3FFh Number of field 2
doublewords
required to generate
DMA events.
0 Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
0–3FFh Number of field 1
doublewords
required to generate
DMA events.
VCTHRLD2
R/W-0
VCTHRLD1
R/W-0
Description
TSI Mode
Not used. Not used.
Number of raw Number of
data doublewords doublewords
required to required to
generate a DMA generate a DMA
event. event.
16
0
SPRU629