Video Port Pin Data Out Register (Pdout) Field Descriptions - Texas Instruments TMS320C64x DSP Reference Manual

GPIO Registers
Table 5–7. Video Port Pin Data Out Register (PDOUT) Field Descriptions
†
Bit field symval
31–23 Reserved –
22 PDOUT22
VCTL3LO
VCTL3HI
21 PDOUT21
VCTL2LO
VCTL2HI
20 PDOUT20
VCTL1LO
VCTL1HI
19–0 PDOUT[19–0]
VDATAnLO
VDATAnHI
† For CSL implementation, use the notation VP_PDOUT_PDOUTn_symval
5-14 General Purpose I/O Operation
†
Value Description
0 Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
PDOUT22 bit drives the VCTL3 pin only when the GPIO is
configured as output.
When reading data, returns the bit value in PDOUT22,
does not return input from pin. When writing data, writes to
PDOUT22 bit.
0 Pin drives low.
1 Pin drives high.
PDOUT21 bit drives the VCTL2 pin only when the GPIO is
configured as output.
When reading data, returns the bit value in PDOUT21,
does not return input from pin. When writing data, writes to
PDOUT21 bit.
0 Pin drives low.
1 Pin drives high.
PDOUT20 bit drives the VCTL1 pin only when the GPIO is
configured as output.
When reading data, returns the bit value in PDOUT20,
does not return input from pin. When writing data, writes to
PDOUT20 bit.
0 Pin drives low.
1 Pin drives high.
PDOUT[19–0] bit drives the corresponding VDATA[19–0]
pin only when the GPIO is configured as output.
When reading data, returns the bit value in PDOUT[n],
does not return input from pin. When writing data, writes to
PDOUT[n] bit.
0 Pin drives low.
1 Pin drives high.
SPRU629