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Display Timing Examples
The vertical output timing is shown in Figure 4–38. SMPTE 296M has a single
active field 1 that is 720-lines high. This example shows the 716-line image
window with an IMGVOFFn of 3 lines and also results in a nondata line at the
end of the field.
The VBLNK and VSYNC signals are shown as they would be output for active-
low operation. Note that only one of the two signals is actually available exter-
nally. The VBLNK and VSYNC edges occur at the end of an active line so their
XSTART/XSTOP values are set to 1280 (start of blanking). The field 2 vertical
timing start and stop registers are programmed to a value greater than 750.
Since this value is never reached by FLCOUNT, no extra VBLNK or VSYNC
transitions occur. For true SMPTE 296M operation, neither VBLNK nor
VSYNC would be used.
The FLD output is setup to transition low at the start of each frame. Since the
FLD2YSTART value is never reached by FLCOUNT, the FLD output remains
always low.
The ILCOUNT operation follows the description in section 4.1.2. ILCOUNT
resets to 1 at the first displayed line (FLCOUNT = VBLNKSTOPx + IMGVOFFn)
and stops counting at the last displayed pixel (IPCOUNT = IMGVSIZEx). The
operation during nondisplay time is not a requirement, it could continue count-
ing until the next FLCOUNT = VBLNKSTOPx + IMGVOFFn point or it could
reset immediately after IMGVSIZEx or when FLCOUNT is reset.
The active horizontal output column shows the output data during the active
portion of the horizontal line. It is assumed that the DVEN bit in VDCTL is set
to enable the default output.
SPRU629
Video Display Port
4-45
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