Video Port Pin Data Output Register (Pdout) - Texas Instruments TMS320C64x DSP Reference Manual

Dsp video port/vcxo interpolated control (vic) port
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5.1.6

Video Port Pin Data Output Register (PDOUT)

The video port pin data output register (PDOUT) is shown in Figure 5–6 and
described in Table 5–7. The bits of PDOUT determine the value driven on the
corresponding GPIO pin, if the pin is configured as an output. Writes do not
affect pins not configured as GPIO outputs. The bits in PDOUT are set or
cleared by writing to this register directly. A read of PDOUT returns the value
of the register not the value at the pin (that might be configured as an input).
An alternative way to set bits in PDOUT is to write a 1 to the corresponding bit
of PDSET. An alternative way to clear bits in PDOUT is to write a 1 to the corre-
sponding bit of PDCLR.
PDOUT has these aliases:
-
-
Figure 5–6. Video Port Pin Data Output Register (PDOUT)
31
23
22
Reserved
PDOUT22
R-0
R/W-0
15
14
PDOUT15
PDOUT14
R/W-0
R/W-0
7
6
PDOUT7
PDOUT6
R/W-0
R/W-0
Legend: R = Read only; R/W = Read/Write; -n = value after reset
SPRU629
PDSET — writing a 1 to a bit in PDSET sets the corresponding bit in
PDOUT to 1; writing a 0 has no effect and keeps the bits in PDOUT
unchanged.
PDCLR — writing a 1 to a bit in PDCLR clears the corresponding bit in
PDOUT to 0; writing a 0 has no effect and keeps the bits in PDOUT
unchanged.
Reserved
R-0
21
20
PDOUT21
PDOUT20
PDOUT19
R/W-0
R/W-0
13
12
PDOUT13
PDOUT12
PDOUT11
R/W-0
R/W-0
5
4
PDOUT5
PDOUT4
PDOUT3
R/W-0
R/W-0
19
18
PDOUT18
PDOUT17
R/W-0
R/W-0
R/W-0
11
10
PDOUT10
PDOUT9
R/W-0
R/W-0
R/W-0
3
2
PDOUT2
PDOUT1
R/W-0
R/W-0
R/W-0
General Purpose I/O Operation
GPIO Registers
24
17
16
PDOUT16
R/W-0
9
8
PDOUT8
R/W-0
1
0
PDOUT0
R/W-0
5-13

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