Peripheral Identification Register (Pid); Peripheral Identification Register (Pid) Field Descriptions - Texas Instruments TURBO-DECODER COPROCESSOR 2 TMS320C6457 DSP User Manual

Dsp turbo-decoder coprocessor 2 (tcp2)
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6.1

Peripheral Identification Register (PID)

The peripheral identification register (PID) is a constant register that contains the ID and ID revision
number for that peripheral. The PID stores version information used to identify the peripheral. All bits
within this register are read-only (writes have no effect) meaning that the values within this register should
be hard-coded with the appropriate values and must not change from their reset state. The peripheral
identification register (PID) is shown in
31
Reserved
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5. Peripheral Identification Register (PID) Field Descriptions
Bit
Field
31-24
Reserved
23-16
TYPE
15-8
CLASS
7-0
REV
SPRUGK1 – March 2009
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Figure 32
Figure 32. Peripheral Identification Register (PID)
R-0
CLASS
R-class
Value
Description
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
Peripheral type. Identifies the type of the peripheral. Set to 0x02 by default.
Peripheral class. Identifies the class. Set to 0x11 by default.
Peripheral revision. Identifies the revision level of the specific instance of the peripheral. This value
should begin at 0x01 and be incremented each time the design is revised.
and described in
Table
24
23
8
7
TMS320C6457 Turbo-Decoder Coprocessor 2
5. TCPIC0 configures the TCP.
TYPE
R-type
REV
R-rev
Registers
16
0
27

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