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jpa
imm7
jpa.d imm7
Function
Unconditional PC absolute jump
Standard)
Extension 1) pc ← imm20
Extension 2) pc ← imm24
15 14 13 12 11 10
Code
0
0
0
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0
0
0
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IL
IE
C
Flag
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–
–
–
Mode
PC absolute
CLK
jpa
jpa.d
Description
(1) Standard
jpa
The 7-bit immediate imm7 is loaded to the PC, and the program branches to that address. The
LSB of the imm7 is ignored and is always handled as 0.
(2) Extension 1
ext
jpa
The ext instruction extends the destination address into 20 bits using its 13-bit immediate
imm13. The 20-bit destination address is set to the PC.
(3) Extension 2
ext
ext
jpa
The 24-bit destination address is set to the PC.
(4) Delayed branch (d bit (bit 7) = 1)
jpa.d
For the jpa.d instruction, the next instruction becomes a delayed slot instruction. A delayed
slot instruction is executed before the program branches. Interrupts are masked in intervals
between the jpa.d instruction and the next instruction, so no interrupts occur.
Example
ext
0x300
jpa
0x00 ; Jumps to the address 0x18000.
Caution
When the jpa.d instruction (delayed branch) is used, be careful to ensure that the next instruction
is limited to those that can be used as a delayed slot instruction. If any other instruction is executed,
the program may operate indeterminately. For the usable instructions, refer to the instruction list in
the Appendix.
S1C17 CORE MANUAL
(Rev. 1.2)
pc ← imm7
9
8
7
6
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0
0
0
1
1
0
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0
0
0
1
1
1
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V
Z
N
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–
–
–
Three cycles
Two cycles (when a one-cycle delayed slot instruction follows), Three cycles (other)
imm7
imm13
; = imm20(19:7)
imm7
; = "jpa imm20", imm7 = imm20(6:0)
imm4
; imm4(3:0) = imm24(23:20)
imm13
; = imm24(19:7)
imm7
; = "jpa imm24", imm7 = imm24(6:0)
imm7
Seiko Epson Corporation
5
4
3
2
1
0
imm7
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imm7
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7 DETAILS OF INSTRUCTIONS
jpa
jpa.d
7-39
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