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7 DETAILS OF INSTRUCTIONS
int imm5
Function
Software interrupt
Standard)
Extension 1) Unusable
Extension 2) Unusable
15 14 13 12 11 10
Code
0
1
1
|
|
IL
IE
C
Flag
|
|
–
0
–
Mode
Immediate data (unsigned)
CLK
Three cycles
Description
Generates the interrupt of the vector number specified with the imm5.
The int instruction saves the address of the next instruction and the contents of the PSR into the
stack, then reads the specified interrupt vector from the vector table and sets it to the PC. By this
processing, the program flow branches to the specified interrupt handler routine.
imm5
0x00
0x01
0x02
0x03
:
0x1f
The TTBR is the vector table base address.
The reti instruction should be used for return from the handler routine.
Example
int
2
7-36
sp ← sp - 4, A[sp] ← {psr, pc + 2}, pc ← TTBR + (vector No. = imm5) × 4
9
8
7
6
|
1
0
1
0
0
0
|
|
|
|
|
|
V
Z
N
|
|
|
–
–
–
Vector No.
Vector address
0
TTBR + 0x00
1
TTBR + 0x04
2
TTBR + 0x08
3
TTBR + 0x0c
:
31
TTBR + 0x7c
; Generates an NMI.
Seiko Epson Corporation
5
4
3
2
1
0
|
imm5
0
1
|
|
|
|
|
Cause of interrupt
Reset interrupt
Address misaligned interrupt
NMI
External maskable interrupt 0x03
:
External maskable interrupt 0x1f
:
S1C17 CORE MANUAL
(REV. 1.2)
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