Epson S1C17 Series Manual page 24

Cmos 16-bit single chip microcontroller
Hide thumbs Also See for S1C17 Series:
Table of Contents

Advertisement

5 INSTRUCTION SET
Classification
Data transfer
ld.a
Integer arithmetic
add
operation
add/c
add/nc
add
add.a
add.a/c
add.a/nc
add.a
adc
adc/c
adc/nc
adc
sub
sub/c
sub/nc
sub
sub.a
sub.a/c
sub.a/nc
sub.a
sbc
sbc/c
sbc/nc
sbc
cmp
cmp/c
cmp/nc
cmp
cmp.a
cmp.a/c
cmp.a/nc
cmp.a
cmc
cmc/c
cmc/nc
cmc
Logical operation
and
and/c
and/nc
and
or
or/c
or/nc
or
xor
xor/c
xor/nc
xor
not
not/c
not/nc
not
5-2
Mnemonic
General-purpose register (32 bits, zero-extended) → stack *
[%sp],%rs
Stack pointer post-increment, post-decrement, and pre-decrement functions can
[%sp]+,%rs
be used.
[%sp]-,%rs
-[%sp],%rs
General-purpose register (24 bits) → SP
%sp,%rs
Immediate → SP
%sp,imm7
16-bit addition between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
16-bit addition of general-purpose register and immediate
%rd,imm7
24-bit addition between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
24-bit addition of SP and general-purpose register
%sp,%rs
24-bit addition of general-purpose register and immediate
%rd,imm7
24-bit addition of SP and immediate
%sp,imm7
16-bit addition with carry between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
16-bit addition of general-purpose register and immediate with carry
%rd,imm7
16-bit subtraction between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
16-bit subtraction of general-purpose register and immediate
%rd,imm7
24-bit subtraction between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
24-bit subtraction of SP and general-purpose register
%sp,%rs
24-bit subtraction of general-purpose register and immediate
%rd,imm7
24-bit subtraction of SP and immediate
%sp,imm7
16-bit subtraction with carry between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
16-bit subtraction of general-purpose register and immediate with carry
%rd,imm7
16-bit comparison between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
16-bit comparison of general-purpose register and immediate
%rd,sign7
24-bit comparison between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
24-bit comparison of general-purpose register and immediate
%rd,imm7
16-bit comparison with carry between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
16-bit comparison of general-purpose register and immediate with carry
%rd,sign7
Logical AND between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
Logical AND of general-purpose register and immediate
%rd,sign7
Logical OR between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
Logical OR of general-purpose register and immediate
%rd,sign7
Exclusive OR between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
Exclusive OR of general-purpose register and immediate
%rd,sign7
Logical inversion between general-purpose registers (1's complement)
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
Logical inversion of general-purpose register and immediate (1's complement)
%rd,sign7
Seiko Epson Corporation
Function
S1C17 CORE MANUAL
(REV. 1.2)

Advertisement

Table of Contents
loading

Table of Contents