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ld %rd, [imm7]
Function
16-bit data transfer
Standard)
Extension 1) rd(15:0) ← W[imm20], rd(23:16) ← 0
Extension 2) rd(15:0) ← W[imm24], rd(23:16) ← 0
15 14 13 12 11 10
Code
1
1
0
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|
IL
IE
C
Flag
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–
–
–
Mode
Src: Immediate data (unsigned)
Dst: Register direct %rd = %r0 to %r7
CLK
One cycle
Description
(1) Standard
ld
%rd,[imm7]
The 16-bit data in the memory address specified with the 7-bit immediate imm7 is transferred to
the rd register. The eight high-order bits of the rd register are set to 0.
(2) Extension 1
ext
ld
The ext instruction extends the memory address to a 20-bit quantity. As a result, the 16-bit
data in the memory address specified with the 20-bit immediate imm20 is transferred to the rd
register. The eight high-order bits of the rd register are set to 0.
(3) Extension 2
ext
ext
ld
The two ext instructions extend the memory address to a 24-bit quantity. As a result, the 16-bit
data in the memory address specified with the 24-bit immediate imm24 is transferred to the rd
register. The eight high-order bits of the rd register are set to 0.
(4) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the "d" bit. In this case, extension of the immediate by the ext
instruction cannot be performed.
Example
ext
0x1
ld
%r0,[0x2]
Caution
The imm7 must specify a 16-bit boundary address (least significant bit = 0). Specifying an odd
address causes an address misaligned interrupt. Note, however, that the data transfer is performed
by setting the least significant bit of the address to 0.
S1C17 CORE MANUAL
(Rev. 1.2)
rd(15:0) ← W[imm7], rd(23:16) ← 0
9
8
7
6
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0
1
0
r d
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V
Z
N
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–
–
–
; memory address = imm7
imm13
; = imm20(19:7)
%rd,[imm7]
; memory address = imm20,
; imm7 = imm20(6:0)
imm4
; imm4(3:0) = imm24(23:20)
imm13
; = imm24(19:7)
%rd,[imm7]
; memory address = sp + imm24,
; imm7 = imm24(6:0)
; r0 ← [0x82]
Seiko Epson Corporation
5
4
3
2
1
0
imm7
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7 DETAILS OF INSTRUCTIONS
7-57
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