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7 DETAILS OF INSTRUCTIONS
ld.a %sp, %rs
Function
24-bit data transfer
Standard)
Extension 1) Unusable
Extension 2) Unusable
15 14 13 12 11 10
Code
0
0
1
|
|
IL
IE
C
Flag
|
|
–
–
–
Mode
Src: Register direct %rs = %r0 to %r7
Dst: Register direct %sp
CLK
One cycle
Description
The content of the rs register is transferred to the SP.
Example
ld.a
%sp,%r0
Caution
In data transfer to the SP, the low-order two bits of the source data are always handled as 0.
7-76
sp(23:2) ← rs(23:2), sp(1:0) ← 0
9
8
7
6
|
|
1
1
1
r s
1
|
|
|
|
|
V
Z
N
|
|
|
–
–
–
; sp ← r0
Seiko Epson Corporation
5
4
3
2
1
0
0
1
0
0
0
0
|
|
|
|
|
|
S1C17 CORE MANUAL
(REV. 1.2)
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