Cmp.a %Rd, Imm7 - Epson S1C17 Series Manual

7 DETAILS OF INSTRUCTIONS

cmp.a %rd, imm7

Function 24-bit comparison
Standard)
Extension 1) rd(23:0) - imm20(zero extended)
Extension 2) rd(23:0) - imm24
15 14 13 12 11 10
Code
0 1 1
| |
IL IE C
Flag
| |
– ↔ – ↔ –
–
Mode Src: Immediate data (unsigned)
Dst: Register direct %rd = %r0 to %r7
CLK One cycle
Description (1) Standard
cmp.a
Subtracts the 7-bit immediate imm7 from the contents of the rd register, and sets or resets the
flags (C and Z) according to the results. The imm7 is zero-extended into 24 bits prior to the
operation. It does not change the contents of the rd register.
(2) Extension 1
ext
cmp.a
Subtracts the 20-bit immediate imm20 from the contents of the rd register, and sets or resets the
flags (C and Z) according to the results. The imm20 is zero-extended into 24 bits prior to the
operation. It does not change the contents of the rd register.
(3) Extension 2
ext
ext
cmp.a
Subtracts the 24-bit immediate imm24 from the contents of the rd register, and sets or resets the
flags (C and Z) according to the results. It does not change the contents of the rd register.
(4) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the "d" bit. In this case, extension of the immediate by the ext
instruction cannot be performed.
Example (1) cmp.a
(2) ext
ext
cmp.a
7-26
rd(23:0) - imm7(zero extended)
9 8 7 6
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1 0 0 r d
| | | | |
V Z N
| | |
%rd,imm7 ; rd - imm7
imm13 ; = imm20(19:7)
%rd,imm7 ; rd - imm20, imm7 = imm20(6:0)
imm4 ; imm4(3:0) = imm24(23:20)
imm13 ; = imm24(19:7)
%rd,imm7 ; rd - imm24, imm7 = imm24(6:0)
%r0,0x7f ; Changes the flags according to the results of
; r0 - 0x7f.
0xf
0x1fff
%r1,0x7f ; Changes the flags according to the results of
; r1 - 0xffffff.
Seiko Epson Corporation
5 4 3 2 1 0
imm7
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S1C17 CORE MANUAL
(REV. 1.2)