7 DETAILS OF INSTRUCTIONS
ld.a %rd, [%rb]+
ld.a %rd, [%rb]-
ld.a %rd, -[%rb]
Function
32-bit data transfer with address increment/decrement option
ld.a %rd, [%rb]+ (with post-increment option)
Standard)
Extension 1) rd(23:0) ← A[rb](23:0), ignored ← A[rb](31:24), rb(23:0) ← rb(23:0) + imm13
Extension 2) rd(23:0) ← A[rb](23:0), ignored ← A[rb](31:24), rb(23:0) ← rb(23:0) + imm24
ld.a %rd, [%rb]- (with post-decrement option)
Standard)
Extension 1) rd(23:0) ← A[rb](23:0), ignored ← A[rb](31:24), rb(23:0) ← rb(23:0) - imm13
Extension 2) rd(23:0) ← A[rb](23:0), ignored ← A[rb](31:24), rb(23:0) ← rb(23:0) - imm24
ld.a %rd, -[%rb] (with pre-decrement option)
Standard)
Extension 1) rb(23:0) ← rb(23:0) - imm13, rd(23:0) ← A[rb](23:0), ignored ← A[rb](31:24)
Extension 2) rb(23:0) ← rb(23:0) - imm24, rd(23:0) ← A[rb](23:0), ignored ← A[rb](31:24)
15 14 13 12 11 10
Code
0
0
1
|
|
0
0
1
|
|
0
0
1
|
|
IL
IE
C
Flag
|
|
–
–
–
Mode
Src: Register indirect %rb = %r0 to %r7
Dst: Register direct %rd = %r0 to %r7
CLK
Two cycles
Description
(1) Address increment/decrement option
Specifying the []+, []-, or -[] option will automatically increment/decrement the memory
address. This allows the program to simply perform continuous data transfer.
ld.a
ld.a
ld.a
The address increment/decrement sizes are listed below.
When no ext is used (standard):
When one ext is used (extension 1): imm13
When two ext are used (extension 2): imm24
7-68
rd(23:0) ← A[rb](23:0), ignored ← A[rb](31:24), rb(23:0) ← rb(23:0) + 4
rd(23:0) ← A[rb](23:0), ignored ← A[rb](31:24), rb(23:0) ← rb(23:0) - 4
rb(23:0) ← rb(23:0) - 4, rd(23:0) ← A[rb](23:0), ignored ← A[rb](31:24)
9
8
7
6
|
|
0
0
0
r d
0
|
|
|
|
|
|
|
0
0
0
1
r d
|
|
|
|
|
|
|
0
0
0
r d
1
|
|
|
|
|
V
Z
N
|
|
|
–
–
–
Load instruction with post-increment option
%rd,[%rb]+
The memory address will be incremented after the data transfer has
finished.
Load instruction with post-decrement option
%rd,[%rb]-
The memory address will be decremented after the data transfer has
finished.
Load instruction with pre-decrement option
%rd,-[%rb]
The memory address will be decremented before starting the data
transfer.
Seiko Epson Corporation
5
4
3
2
1
0
|
1
1
1
r b
|
|
|
|
|
|
1
1
1
r b
|
|
|
|
|
|
0
1
1
r b
|
|
|
|
|
4 (32-bit size)
ld.a
%rd,[%rb]+
ld.a
%rd,[%rb]-
ld.a
%rd,-[%rb]
S1C17 CORE MANUAL
(REV. 1.2)