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Appendix List of S1C17 Core Instructions
Symbols in the Instruction List
Registers/Register Data
%rd, rd:
A general-purpose register (R0–R7) used as the destination register or its contents
%rs, rs:
A general-purpose register (R0–R7) used as the source register or its contents
%rb, rb:
A general-purpose register (R0–R7) that has stored a base address to be accessed in
the register indirect addressing mode or its contents
%sp, sp:
Stack pointer (SP) or its contents
%pc, pc:
Program counter (PC) or its contents
Memory/Addresses/Memory Data
[%rb], [%sp]:
Specification for register indirect addressing
[%rb]+, [%sp]+: Specification for register indirect addressing with post-increment
[%rb]-, [%sp]-: Specification for register indirect addressing with post-decrement
-[%rb], -[%sp]: Specification for register indirect addressing with pre-decrement
[%sp+immX]:
Specification for register indirect addressing with a displacement
[imm7]:
Specification for a memory address with an immediate data
B[XXX]:
An address specified with XXX, or the byte data stored in the address
W[XXX]:
A 16-bit address specified with XXX, or the word data stored in the address
A[XXX]:
A 32-bit address specified with XXX, or the 24-bit or 32-bit data stored in the address
Immediate
immX:
A X-bit unsigned immediate data
signX:
A X-bit signed immediate data
Bit Field
(X):
Bit X of data
(X:Y):
A bit field from bit X to bit Y
{X, Y···}:
Indicates a bit (data) configuration.
Code
rd, rs, rb:
Register number (R0 = 0 ... R7 = 7)
d:
Delayed bit (0: Standard branch instruction, 1: Delayed branch instruction)
Functions
←:
Indicates that the right item is loaded or set to the left item.
+:
Addition
-:
Subtraction
&:
AND
|:
OR
^:
XOR
!:
NOT
Flags
IL:
Interrupt level
IE:
Interrupt enable flag
C:
Carry flag
V:
Overflow flag
Z:
Zero flag
N:
Negative flag
–:
Not changed
↔:
Set (1) or reset (0)
1:
Set (1)
0:
Reset (0)
EXT
*X:
Indicates that the operand can be extended (see the Remarks on each page for the
extended operand).
–:
Indicates that the operand cannot be extended.
D
:
Indicates that the instruction can be used as a delayed slot instruction.
–:
Indicates that the instruction cannot be used as a delayed slot instruction.
S1C17 Core Instruction Set
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