Epson S1C17 Series Manual page 198

Cmos 16-bit single chip microcontroller
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Integer Arithmetic Operation Instructions (2)
Mnemonic
Opcode
Operand
MSB
cmp.a
%rd, %rs
0
0
1
1
cmp.a/c
%rd, %rs
0
0
1
1
cmp.a/nc
%rd, %rs
0
0
1
1
cmp.a
%rd, imm7
0
1
1
1
cmc
%rd, %rs
0
0
1
1
cmc/c
%rd, %rs
0
0
1
1
cmc/nc
%rd, %rs
0
0
1
1
cmc
%rd, sign7
1
0
0
1
Remarks
*1) With one EXT: rd ← rs <op> imm13, With two EXT: rd ← rs <op> imm16
*2) With one EXT: rd ← rs <op> imm13, With two EXT: rd ← rs <op> imm24
*3) With one EXT: data = imm16/sign16
*4) With one EXT: data = imm20, With two EXT: data = imm24
Logic Operation Instructions
Mnemonic
Opcode
Operand
MSB
and
%rd, %rs
0
0
1
0
and/c
%rd, %rs
0
0
1
0
and/nc
%rd, %rs
0
0
1
0
and
%rd, sign7
1
0
1
0
or
%rd, %rs
0
0
1
0
or/c
%rd, %rs
0
0
1
0
or/nc
%rd, %rs
0
0
1
0
or
%rd, sign7
1
0
1
0
xor
%rd, %rs
0
0
1
0
xor/c
%rd, %rs
0
0
1
0
xor/nc
%rd, %rs
0
0
1
0
xor
%rd, sign7
1
0
1
0
not
%rd, %rs
0
0
1
0
not/c
%rd, %rs
0
0
1
0
not/nc
%rd, %rs
0
0
1
0
not
%rd, sign7
1
0
1
0
Remarks
*1) With one EXT: rd ← rs <op> imm13, With two EXT: rd ← rs <op> imm16
*2) With one EXT: data = sign16
*3) With one EXT: rd ← !imm13, With two EXT: rd ← !imm16
Code
LSB
0
1
rd
1
0
0
0
rs
rd(23:0)-rs(23:0)
0
1
rd
0
0
0
0
rs
rd(23:0)-rs(23:0) if C = 1 (nop if C = 0)
0
1
rd
0
1
0
0
rs
rd(23:0)-rs(23:0) if C = 0 (nop if C = 1)
0
0
rd
imm7
rd(23:0)-imm7(zero extended)
1
1
rd
1
0
0
1
rs
rd(15:0)-rs(15:0)-C
1
1
rd
0
0
0
1
rs
rd(15:0)-rs(15:0)-C if C = 1 (nop if C = 0)
1
1
rd
0
1
0
1
rs
rd(15:0)-rs(15:0)-C if C = 0 (nop if C = 1)
rd
sign7
0
1
rd(15:0)-sign7(sign extended)-C
Code
LSB
1
1
rd
1
0
0
0
rs
rd(15:0)←rd(15:0)&rs(15:0), rd(23:16)←0
1
1
rd
0
0
0
0
rs
rd(15:0)←rd(15:0)&rs(15:0), rd(23:16)←0 if C = 1 (nop if C = 0)
1
1
rd
0
1
0
0
rs
rd(15:0)←rd(15:0)&rs(15:0), rd(23:16)←0 if C = 0 (nop if C = 1)
0
0
rd
sign7
rd(15:0)←rd(15:0)&sign7(sign extended), rd(23:16)←0
1
1
rd
1
0
0
1
rs
rd(15:0)←rd(15:0) | rs(15:0), rd(23:16)←0
1
1
rd
0
0
0
1
rs
rd(15:0)←rd(15:0) | rs(15:0), rd(23:16)←0 if C = 1 (nop if C = 0)
1
1
rd
0
1
0
1
rs
rd(15:0)←rd(15:0) | rs(15:0), rd(23:16)←0 if C = 0 (nop if C = 1)
0
1
rd
sign7
rd(15:0)←rd(15:0) | sign7(sign extended), rd(23:16)←0
1
1
rd
1
0
1
0
rs
rd(15:0)←rd(15:0)^rs(15:0), rd(23:16)←0
1
1
rd
0
0
1
0
rs
rd(15:0)←rd(15:0)^rs(15:0), rd(23:16)←0 if C = 1 (nop if C = 0)
1
1
rd
0
1
1
0
rs
rd(15:0)←rd(15:0)^rs(15:0), rd(23:16)←0 if C = 0 (nop if C = 1)
1
0
rd
sign7
rd(15:0)←rd(15:0)^sign7(sign extended), rd(23:16)←0
1
1
rd
1
0
1
1
rs
rd(15:0)←!rs(15:0), rd(23:16)←0
rd
0
0
1
1
rs
1
1
rd(15:0)←!rs(15:0), rd(23:16)←0 if C = 1 (nop if C = 0)
1
1
rd
0
1
1
1
rs
rd(15:0)←!rs(15:0), rd(23:16)←0 if C = 0 (nop if C = 1)
1
1
rd
sign7
rd(15:0)←!sign7(sign extended), rd(23:16)←0
Function
Function
S1C17 Core Instruction Set
Flags
Cycle
EXT
D
IL
IE
C
V
Z
N
*2
1
1
*2
1
*2
1
*4
1
*1
1
*1
1
*1
*3
1
S1C17 Core Instruction Set
Flags
Cycle
EXT
D
IL
IE
C
V
Z
N
*1
1
0
*1
1
0
*1
1
0
*2
1
0
*1
1
0
*1
1
0
*1
1
0
1
0
*2
1
0
*1
1
0
*1
1
0
*1
1
0
*2
1
0
*3
*3
1
0
*3
1
0
*2
1
0

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