Ld.a [%Sp]+, %Rs - Epson S1C17 Series Manual

7 DETAILS OF INSTRUCTIONS

ld.a [%sp]+, %rs

ld.a [%sp]-, %rs
ld.a -[%sp], %rs
Function 32-bit data transfer with address increment/decrement option
ld.a [%sp]+, %rs (with post-increment option)
Standard)
Extension 1) A[sp](23:0) ← rs(23:0), A[sp](31:24) ← 0, sp(23:0) ← sp(23:0) + imm13
Extension 2) A[sp](23:0) ← rs(23:0), A[sp](31:24) ← 0, sp(23:0) ← sp(23:0) + imm24
ld.a [%sp]-, %rs (with post-decrement option)
Standard)
Extension 1) A[sp](23:0) ← rs(23:0), A[sp](31:24) ← 0, sp(23:0) ← sp(23:0) - imm13
Extension 2) A[sp](23:0) ← rs(23:0), A[sp](31:24) ← 0, sp(23:0) ← sp(23:0) - imm24
ld.a -[%sp], %rs (with pre-decrement option)
Standard)
Extension 1) sp(23:0) ← sp(23:0) - imm13, A[sp](23:0) ← rs(23:0), A[sp](31:24) ← 0
Extension 2) sp(23:0) ← sp(23:0) - imm24, A[sp](23:0) ← rs(23:0), A[sp](31:24) ← 0
15 14 13 12 11 10
Code
0 0 1
| |
0 0 1
| |
0 0 1
| |
IL IE C
Flag
| |
– – –
Mode Src: Register direct %rs = %r0 to %r7
Dst: Register indirect %sp
CLK Two cycles
Description
(1) Address increment/decrement option
Specifying the []+, []-, or -[] option will automatically increment/decrement the memory
address. This allows the program to simply perform continuous data transfer.
ld.a
ld.a
ld.a
The address increment/decrement sizes are listed below.
When no ext is used (standard):
When one ext is used (extension 1): imm13
When two ext are used (extension 2): imm24
7-82
A[sp](23:0) ← rs(23:0), A[sp](31:24) ← 0, sp(23:0) ← sp(23:0) + 4
A[sp](23:0) ← rs(23:0), A[sp](31:24) ← 0, sp(23:0) ← sp(23:0) - 4
sp(23:0) ← sp(23:0) - 4, A[sp](23:0) ← rs(23:0), A[sp](31:24) ← 0
9 8 7 6
| |
1 1 1 r s 0
| | | | |
| |
1 1 1 1
r s
| | | | |
| |
1 1 1 r s 1
| | | | |
V Z N
| | |
– – –
Load instruction with post-increment option
[%sp]+,%rs
The memory address will be incremented after the data transfer has
finished.
Load instruction with post-decrement option
[%sp]-,%rs
The memory address will be decremented after the data transfer has
finished.
Load instruction with pre-decrement option
-[%sp],%rs
The memory address will be decremented before starting the data
transfer.
Seiko Epson Corporation
5 4 3 2 1 0
1 1 1 1 0 0
| | | | | |
1 1 1 1 0 0
| | | | | |
0 1 1 1 0 0
| | | | | |
4 (32-bit size)
ld.a [%sp]+,%rs
ld.a [%sp]-,%rs
ld.a -[%sp],%rs
S1C17 CORE MANUAL
(REV. 1.2)