The Scpi Status Registers; The Status Byte Register (Stb) - Tabor Electronics 5064 User Manual

The SCPI Status
Registers
The Status Byte
Register (STB)
a decimal value in the range of 0 to 63 or 128 to 191 since bit 6 (RSQ)
cannot be set. The binary-weighted sum of the number represents the
value of the bits of the Service Request enable register.
*STB? - Query the Status Byte summary register. The *STB?
command is similar to a serial poll but is processed like any other
instrument command. The *STB? command returns the same result as
a serial poll, but the "request service" bit (bit 6) is not cleared if a serial
poll has occurred.
*TRG - Triggers the generator from the remote interface. This
command effects the generator if it is first placed in the Trigger or Burst
mode of operation and the trigger source is set to "BUS".
*WAI – Wait for all pending operations to complete before executing
any additional commands over the interface.
The Model 2074 uses the Status Byte register group and the
Standard Event register group to record various instrument
conditions. Figure 5-1 shows the SCPI status system.
An Event Register is a read-only register that reports defined
conditions within the generator. Bits in an event register are latched.
When an event bit is set, subsequent state changes are ignored.
Bits in an event register are automatically cleared by a query of that
register or by sending the *CLS command. The *RST command or
device clear does not clear bits in an event register. Querying an
event register returns a decimal value, which corresponds to the
binary-weighted sum of all bits, set in the register.
An Event Register defines which bits in the corresponding event
register are logically ORed together to form a single summary bit.
The user can read from and write to an Enable Register. Querying
an Enable Register will not clear it. The *CLS command does not
clear Enable Registers but it does clear bits in the event registers.
To enable bits in an enable register, write a decimal value that
corresponds to the binary-weighted sum of the bits required to
enable in the register.
The Status Byte summary register contains conditions from the
other registers. Query data waiting in the generator's output buffer
is immediately reported through the Message Available bit (bit 4).
Bits in the summary register are not latched. Clearing an event
register will clear the corresponding bits in the Status Byte summary
register. Description of the various bits within the Status Byte
summary register is given in the following:
Bit 0 - Decimal value 1. Not used, always set to 0.
Bit 1 - Decimal value 2. Not used, always set to 0.
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