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Philips Semiconductors
Volume 1
1.9 Block diagram
LPC2141/42/44/46/48
P0[31:28] and
FAST GENERAL
P0[25:0]
PURPOSE I/O
P1[31:16]
INTERNAL
SRAM
CONTROLLER
8/16/32 kB
SRAM
EINT3 to EINT0
4 × CAP0
4 × CAP1
8 × MAT0
8 × MAT1
AD0[7:6] and
AD0[4:1]
(2)
AD1[7:0]
(4)
AOUT
P0[31:28] and
P0[25:0]
P1[31:16]
PWM6 to PWM0
(1) Pins shared with GPIO.
(2) LPCC2144/6/8 only.
(3) USB DMA controller with 8 kB of RAM accessible as general purpose RAM and/or DMA is available in LPC2146/8 only.
(4) LPC2142/4/6/8 only.
Fig 1. LPC2141/2/4/6/8 block diagram
User manual
TMS
(1)
TRST
TEST/DEBUG
INTERFACE
ARM7TDMI-S
AHB BRIDGE
ARM7 local bus
INTERNAL
FLASH
CONTROLLER
32/64/128/256/512 kB
FLASH
EXTERNAL
INTERRUPTS
CAPTURE/COMPARE
(W/EXTERNAL CLOCK)
TIMER 0/TIMER 1
A/D CONVERTERS
(2)
0 AND 1
GENERAL
PURPOSE I/O
PWM0
Rev. 01 — 15 August 2005
(1)
(1)
TDI
(1)
(1)
TCK
TDO
system
clock
USB
clock
AMBA AHB
(Advanced High-performance Bus)
AHB TO VPB
VPB
SHARED WITH
BRIDGE
DIVIDER
VPB (VLSI
peripheral bus)
USB 2.0 FULL-SPEED
DEVICE CONTROLLER
INTERFACES 0 AND 1
SERIAL INTERFACES
UM10139
Chapter 1: Introductory information
XTAL2
XTAL1
RST
PLL0
SYSTEM
FUNCTIONS
PLL1
VECTORED
INTERRUPT
CONTROLLER
8 kB RAM
AHB
DECODER
(3)
USB DMA
(3)
WITH DMA
2
I
C-BUS SERIAL
SPI AND SSP
UART0/UART1
REAL-TIME CLOCK
WATCHDOG
TIMER
SYSTEM
CONTROL
002aab560
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
D+
D−
UP_LED
CONNECT
V
BUS
SCL0, SCL1
SDA0, SDA1
SCK0, SCK1
MOSI0, MOSI1
MISO0, MISO1
SSEL0, SSEL1
TXD0, TXD1
RXD0, RXD1
(2)
(2)
DSR1
,CTS1
,
(2)
(2)
RTS1
, DTR1
(2)
(2)
DCD1
,RI1
RTXC1
RTXC2
V
BAT
7
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