Usb Endpoint Index Register (Usbepin - 0Xe009 0048); Usb Maxpacketsize Register (Usbmaxpsize - 0Xe009 004C) - Philips LPC214 Series User Manual

Philips Semiconductors
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read or write accesses, the DMA logic can do 32-byte burst access. The CPU and DMA
engine operates at a higher clock frequency as compared to the SIE engine. The CPU
cycles are valuable and so the CPU is given the highest priority. The CPU clock frequency
is higher than the SIE operating frequency (12 MHz). The SIE will take 32 clock cycles for
a word transfer. In general, this time translates to more than 32 clock cycles of the CPU in
which it can do easily several accesses to the memory.

14.8.1 USB Endpoint Index register (USBEpIn - 0xE009 0048)

Each endpoint has a register carrying the Maxpacket size value for that endpoint.This is in
fact a register array. Hence before writing, this register has to be 'addressed' through the
Endpoint Index register. The USBEpIn is a write only register.
The Endpoint Index register will hold the physical endpoint number. Writing into the
Maxpacket size register will set the array element pointed by the Endpoint Index register.
Table 197: USB Endpoint Index register (USBEpIn - address 0xE009 0048) bit description
Bit
4:0
31:5

14.8.2 USB MaxPacketSize register (USBMaxPSize - 0xE009 004C)

At power on control endpoint is assigned the Maxpacketsize of 8 bytes. Other endpoints
are assigned 0. Modifying MaxPacketSize register content will cause the buffer address of
the internal RAM to be recalculated. This is essentially a multi-cycle process. At the end of
it, the EP_RLZED bit will be set in the Device Interrupt Status register
The USB MaxPacket register array indexing is shown in
a read/write register.
Table 198: USB MaxPacketSize register (USBMaxPSize - address 0xE009 004C) bit
Bit
9:0
31:10 -
9397 750 XXXXX
User manual
Symbol Description
Phy_endpoint Physical endpoint number (0-31)
- Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
description
Symbol Description
MaxPacketSize The maximum packet size value.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Endpoint index
Fig 51. USB MaxPacket register array indexing
Rev. 01 — 15 August 2005
UM10139
Chapter 14: USB Device Controller
(Section
Figure 51. The USBMaxPSize is
MPS*_EP0
MPS*_EP31
* MPS - Maximum Packet Size
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Reset value
0
NA
14.7.2).
Reset value
0x008
NA
210