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Philips Semiconductors
Volume 1
When the slave address and data direction bit have been transmitted and an acknowledge
bit has been received, the SI bit is set, and the Status Register will show the status code.
For master mode, the possible status codes are 0x40, 0x48, or 0x38. For slave mode, the
possible status codes are 0x68, 0x78, or 0xB0. For details, refer to
After a repeated START condition, I
11.5.3 Slave Receiver mode
In the slave receiver mode, data bytes are received from a master transmitter. To initialize
the slave receiver mode, user write the Slave Address register (I2ADR) and write the I
Control Set register (I2CONSET) as shown in
Table 134: I2C0CONSET and I2C1CONSET used to configure Slave mode
I2EN must be set to 1 to enable the I
its own slave address or the general call address. The STA, STO and SI bits are set to 0.
User manual
S
SLAVE ADDRESS
From Master to Slave
From Slave to Master
Fig 26. Format of Master Receive mode
S
SLA
R
A
DATA
From Master to Slave
From Slave to Master
Fig 27. A Master Receiver switches to Master Transmitter after sending Repeated START
Bit
7
6
Symbol
-
I2EN
Value
-
1
Rev. 01 — 15 August 2005
R
A
DATA
"0" - Write
"1" - Read
2
C may switch to the master transmitter mode.
A
DATA
A
Data Transferred
(n Bytes + Acknowledge)
Table
5
4
STA
STO
0
0
2
C function. AA bit must be set to 1 to acknowledge
UM10139
Chapter 11: I
Table
A
DATA
Data Transferred
(n Bytes + Acknowledge)
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START Condition
P = STOP Condition
RS
SLA
W
A
DATA
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START Condition
P = STOP Condition
SLA = Slave Address
134.
3
2
1
SI
AA
-
0
1
-
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
2
C interfaces
149.
A
P
A
P
2
C
0
-
-
136
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