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Philips Semiconductors
Volume 1
for F/S-mode I
useful capability, but intrinsically limits alternate uses for the same pins if the I
is not used. Seldom is this capability needed on multiple I
microcontroller.
11.4 Pin description
Table 132: I
Pin
SDA0,1
SCL0,1
2
11.5 I
C operating modes
In a given application, the I
mode, the I
one of these addresses is detected, an interrupt is requested. If the processor wishes to
become the bus master, the hardware waits until the bus is free before the master mode is
entered so that a possible slave operation is not interrupted. If bus arbitration is lost in the
master mode, the I
own slave address in the same serial transfer.
11.5.1 Master Transmitter mode
In this mode data is transmitted from master to slave. Before the master transmitter mode
can be entered, the I2CONSET register must be initialized as shown in
must be set to 1 to enable the I
User manual
2
C-bus devices" in the microcontrollers datasheet). This is sometimes a
2
I
C BUS
SDA
SCL
LPC2141/2/4/6/8
2
Fig 24. I
C-bus Configuration
2
C Pin Description
Type
Input/Output
Input/Output
2
C hardware looks for its own slave address and the general call address. If
2
C block switches to the slave mode immediately and can detect its
Rev. 01 — 15 August 2005
Pull-up
Pull-up
resisor
resisor
OTHER DEVICE
2
WITH I
C
INTERFACE
Description
2
I
C Serial Data.
2
I
C Serial Clock.
2
C block may operate as a master, a slave, or both. In the slave
2
C function. If the AA bit is 0, the I
UM10139
2
Chapter 11: I
C interfaces
2
C interface
2
C interfaces within the same
SDA
SCL
OTHER DEVICE
2
WITH I
C
INTERFACE
Table
133. I2EN
2
C interface will not
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
134
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