Philips LPC214 Series User Manual page 94

Philips Semiconductors
Volume 1
loop: b
Figure 17
PLL generated F
enabled with MEMCR = 2 and MEMTIM = 3, and VPBDIV = 1 (PCLK = CCLK).
Fig 17. Illustration of the fast and slow GPIO access and output showing 3.5 x increase of the pin output
frequency
User manual
str r2,[r1]
str r2,[r0]
str r2,[r1]
/*Generate 2 pulses on the slow port*/
str r5,[r3]
str r5,[r4]
str r5,[r3]
str r5,[r4]
loop
illustrates the code from above executed from the LPC2148 Flash memory. The
=60 MHz out of external F
CCLK
Rev. 01 — 15 August 2005
UM10139
= 12 MHz. The MAM was fully
OSC
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Chapter 8: GPIO
94