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Philips Semiconductors
Volume 1
14.5 Data Flow
USB is a host controlled protocol, i.e., irrespective of whether the data transfer is from the
host to the device or device to the host, transfer sequence is always initiated by the host.
During data transfer from device to the host, the host sends an IN token to the device,
following which the device responds with the data.
14.5.1 Data Flow from USB Host to the Device
The USB device protocol engine receives the serial data from the ATX and converts it into
a parallel data stream. The parallel data is sent to the RAM interface which in turn
transfers the data to the endpoint buffer. The endpoint buffer is implemented as an SRAM
based FIFO. Each realized endpoint will have a reserved space in the RAM. So the total
RAM space required depends on the number of realized endpoints, maximum packet size
of the endpoint and whether the endpoint supports double buffering. Data is written to the
buffers with the header showing how many bytes are valid in the buffer.
For non-isochronous endpoints, when a full data packet is received without any errors, the
endpoint generates a request for data transfer from its FIFO by generating an interrupt to
the system.
Isochronous endpoint will have one packet of data to be transferred in every frame. So the
data transfer has to be synchronized to the USB frame rather than packet arrival. So, for
every 1 ms there will be an interrupt to the system.
The data transfer follows the little endian format. The first byte received from the USB bus
will be available in the least significant byte of the receive data register.
14.5.2 Data Flow from Device to the Host
For data transfer from an endpoint to the host, the host will send an IN token to that
endpoint. If the FIFO corresponding to the endpoint is empty, the device will return a NAK
and will raise an interrupt to the system. On this interrupt the CPU fills a packet of data in
the endpoint FIFO.The next IN token that comes after filling this packet will transfer this
packet to the host.
The data transfer follows the little endian format. The first byte sent on the USB bus will be
the least significant byte of the transmit data register.
14.5.3 Slave Mode Transfer
Slave data transfer is done through the interrupt issued from the USB device to the CPU.
Reception of valid (error-free) data packet in any of the OUT non-isochronous endpoint
buffer generates an interrupt. Upon receiving the interrupt, the software can read the data
using receive length and data registers. When there is no empty buffer (for a given OUT
non-isochronous endpoint), any data arrival generates an interrupt only if Interrupt on
NAK feature for that endpoint type is enabled and the existing interrupt is cleared. For
OUT isochronous endpoints, the data will always be written irrespective of the buffer
status. There will be no interrupt generated specific to OUT isochronous endpoints other
than the frame interrupt.
9397 750 XXXXX
User manual
Rev. 01 — 15 August 2005
UM10139
Chapter 14: USB Device Controller
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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