Register Description - Philips LPC214 Series User Manual

Philips Semiconductors
Volume 1
Table 5:
Pin name
EINT2
EINT3
RESET

3.3 Register description

All registers, regardless of size, are on word address boundaries. Details of the registers
appear in the description of each function.
Table 6:
Name
External Interrupts
EXTINT
INTWAKE
EXTMODE
EXTPOLAR
Memory Mapping Control
MEMMAP
Phase Locked Loop
PLL0CON
PLL0CFG
PLL0STAT
PLL0FEED
PLL1CON
PLL1CFG
PLL1STAT
PLL1FEED
Power Control
PCON
PCONP
VPB Divider
VPBDIV
Reset
RSID
Code Security/Debugging
User manual
Pin summary
Pin Pin description
direction
Input External Interrupt Input 2 - See the EINT0 description above.
Pins P0.7 and P0.15 can be selected to perform EINT2 function.
Input External Interrupt Input 3 - See the EINT0 description above.
Pins P0.9, P0.20 and P0.30 can be selected to perform EINT3
function.
Input External Reset input - A LOW on this pin resets the chip, causing
I/O ports and peripherals to take on their default states, and the
processor to begin execution at address 0x0000 0000.
Summary of system control registers
Description
External Interrupt Flag Register
Interrupt Wakeup Register
External Interrupt Mode Register
External Interrupt Polarity Register
Memory Mapping Control
PLL0 Control Register
PLL0 Configuration Register
PLL0 Status Register
PLL0 Feed Register
PLL1 (USB) Control Register
PLL1 (USB) Configuration Register
PLL1 (USB) Status Register
PLL1 (USB) Feed Register
Power Control Register
Power Control for Peripherals
VPB Divider Control
Reset Source Identification Register
Rev. 01 — 15 August 2005
UM10139
Chapter 3: System Control Block
Access Reset Address
[1]
value
R/W 0 0xE01F C140
R/W 0 0xE01F C144
R/W 0 0xE01F C148
R/W 0 0xE01F C14C
R/W 0 0xE01F C040
R/W 0 0xE01F C080
R/W 0 0xE01F C084
RO 0 0xE01F C088
WO NA 0xE01F C08C
R/W 0 0xE01F C0A0
R/W 0 0xE01F C0A4
RO 0 0xE01F C0A8
WO NA 0xE01F C0AC
R/W 0 0xE01F C0C0
R/W 0x03BE 0xE01F C0C4
R/W 0 0xE01F C100
R/W 0 0xE01F C180
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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