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Philips Semiconductors
Volume 1
Table 126: Modem status interrupt generation
Enable Modem
CTSen
Status
(U1MCR[7])
Interrupt
(U1IER[3])
0
x
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
The auto-CTS function reduces interrupts to the host system. When flow control is
enabled, a CTS1 state change does not trigger host interrupts because the device
automatically controls its own transmitter. Without auto-CTS, the transmitter sends any
data present in the transmit FIFO and a receiver overrun error can result.
illustrates the auto-CTS functional timing.
UART1 Tx
start bits0..7
CTS1 pin
Fig 21. Auto-CTS functional timing
While starting transmission of the initial character the CTS1 signal is asserted.
Transmission will stall as soon as the pending transmission has completed. The UART will
continue transmitting a 1 bit as long as CTS1 is deasserted (high). As soon as CTS1 gets
deasserted transmission resumes and a start bit is sent followed by the data bits of the
next character.
10.3.11 UART1 Line Status Register (U1LSR - 0xE001 0014, Read Only)
The U1LSR is a read-only register that provides status information on the UART1 TX and
RX blocks.
Table 127: UART1 Line Status Register (U1LSR - address 0xE001 0014, read only) bit description
Bit Symbol
Value Description
0
Receiver Data
Ready
(RDR)
0
1
User manual
CTS Interrupt
Delta CTS
Enable
(U1MSR[0])
(U1IER[7])
x
x
x
0
x
1
x
x
0
x
0
x
1
0
1
1
1
x
stop
start bits0..7 stop
U1LSR[0] is set when the U1RBR holds an unread character and is cleared when
the UART1 RBR FIFO is empty.
U1RBR is empty.
U1RBR contains valid data.
Rev. 01 — 15 August 2005
Delta DCD or
Trailing Edge RI or
Delta DSR
(U1MSR[3] or U1MSR[2] or (U1MSR[1]))
x
0
x
1
0
1
0
x
1
UM10139
Chapter 10: UART1
Modem Status
Interrupt
no
no
yes
yes
no
yes
no
yes
yes
Figure 21
start bits0..7 stop
Reset
value
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
125
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