Philips LPC214 Series User Manual page 73

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Philips Semiconductors
Volume 1
Table 58:
Pin description
Symbol
Pin
[6]
P1.22/
40
PIPESTAT1
[6]
P1.23/
36
PIPESTAT2
[6]
P1.24/
32
TRACECLK
[6]
P1.25/EXTIN0
28
[6]
P1.26/RTCK
24
[6]
P1.27/TDO
64
[6]
P1.28/TDI
60
[6]
P1.29/TCK
56
[6]
P1.30/TMS
52
[6]
P1.31/TRST
20
[7]
D+
10
[7]
D-
10
[8]
RESET
57
[9]
XTAL1
62
[9]
XTAL2
61
[9]
RTXC1
3
[9]
RTXC2
5
V
6, 18, 25, 42,
SS
50
V
59
SSA
V
23, 43, 51
DD
User manual
...continued
Type
Description
I/O
P1.22 — General purpose digital input/output pin
O
PIPESTAT1 — Pipeline Status, bit 1. Standard I/O port with internal pull-up.
I/O
P1.23 — General purpose digital input/output pin
O
PIPESTAT2 — Pipeline Status, bit 2. Standard I/O port with internal pull-up.
I/O
P1.24 — General purpose digital input/output pin
O
TRACECLK — Trace Clock. Standard I/O port with internal pull-up.
I/O
P1.25 — General purpose digital input/output pin
I
EXTIN0 — External Trigger Input. Standard I/O with internal pull-up.
I/O
P1.26 — General purpose digital input/output pin
I/O
RTCK — Returned Test Clock output. Extra signal added to the JTAG port.
Assists debugger synchronization when processor frequency varies.
Bi-directional pin with internal pull-up.
Note: LOW on this pin while RESET is LOW enables pins P1.31:26 to
operate as Debug port after reset
I/O
P1.27 — General purpose digital input/output pin
O
TDO — Test Data out for JTAG interface.
I/O
P1.28 — General purpose digital input/output pin
I
TDI — Test Data in for JTAG interface.
I/O
P1.29 — General purpose digital input/output pin
I
TCK — Test Clock for JTAG interface.
I/O
P1.30 — General purpose digital input/output pin
I
TMS — Test Mode Select for JTAG interface.
I/O
P1.31 — General purpose digital input/output pin
I
TRST — Test Reset for JTAG interface.
I/O
USB bidirectional D+ line.
I/O
USB bidirectional D- line.
I
External reset input: A LOW on this pin resets the device, causing I/O ports
and peripherals to take on their default states, and processor execution to
begin at address 0. TTL with hysteresis, 5 V tolerant.
I
Input to the oscillator circuit and internal clock generator circuits.
O
Output from the oscillator amplifier.
I
Input to the RTC oscillator circuit.
O
Output from the RTC oscillator circuit.
I
Ground: 0 V reference
I
Analog Ground: 0 V reference. This should nominally be the same voltage
as V
, but should be isolated to minimize noise and error.
SS
I
3.3 V Power Supply: This is the power supply voltage for the core and I/O
ports.
Rev. 01 — 15 August 2005
UM10139
Chapter 6: Pin Configuration
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
73

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