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14.9.13 Clear Buffer (Command: 0xF2, Data: read 1 byte (optional))
When a packet sent by the host has been received successfully, an internal Endpoint
Buffer Full flag is set. All subsequent packets will be refused by returning a NAK. When
the CPU has read the data, it should free the buffer by the Clear Buffer command. When
the buffer is cleared, new packets will be accepted.
When bit 0 of the optional data byte is 1, the previously received packet was over-written
by a SETUP packet. The Packet overwritten bit is used only in control transfers. According
to the USB specification, SETUP packet should be accepted irrespective of the buffer
status. The software should always check the status of the PO bit after reading the
SETUP data. If it is set then it should discard the previously read data, clear the PO bit by
issuing a Select Endpoint/Clear Interrupt command, read the new SETUP data and again
check the status of the PO bit.
Table 234: Clear Buffer Register bit description
Bit
0
7:1 -
14.9.14 Validate Buffer (Command: 0xFA, Data: none)
When the CPU has written data into an IN buffer, it should set the buffer full flag by the
Validate Buffer command. This indicates that the data in the buffer is valid and can be sent
to the host when the next IN token is received.
A control IN buffer cannot be validated when the Packet Over-written bit of its
corresponding OUT buffer is set or when the Set up packet is pending in the buffer. For the
control endpoint the validated buffer will be invalidated when a Setup packet is received.
14.10 DMA descriptor
A DMA transfer can be characterized by a structure describing these parameters. This
structure is called the DMA Descriptor (DD).
The DMA descriptors are placed in the USB RAM. These descriptors can be located
anywhere in the USB RAM in the wordaligned boundaries. USB RAM is part of the system
memory which is used for the USB purposes. It is located at address 0x7FD0 0000 and is
8192 bytes (8 kB) in size.
DD for non-isochronous endpoints are four-word long and isochronous endpoints are
five-word long.
Total USB RAM required for DD is:
Total_USBDDRAM = (No.of_non-ISOendpoints × 4 + No.of_ISOendpoints × 5)
9397 750 XXXXX
User manual
Symbol Value Description
PO
Packet over-written bit. This bit is only applicable to the control
endpoint EP0.
0
The previously received packet is intact.
1
The previously received packet was over-written by a later SETUP
packet.
-
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
Rev. 01 — 15 August 2005
UM10139
Chapter 14: USB Device Controller
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Reset
value
0
NA
230
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