Philips LPC214 Series User Manual page 87

Philips Semiconductors
Volume 1
If a pin has an analog function as one of its options, the pin state cannot be read if the
analog configuration is selected. Selecting the pin as an A/D input disconnects the digital
features of the pin. In that case, the pin value read in the IOPIN register is not valid.
Writing to the IOPIN register stores the value in the port output register, bypassing the
need to use both the IOSET and IOCLR registers to obtain the entire written value. This
feature should be used carefully in an application since it affects the entire port.
Legacy registers are the IO0PIN and IO1PIN, while the enhanced GPIOs are supported
via the FIO0PIN and FIO1PIN registers. Access to a port pins via the FIOPIN register is
conditioned by the corresponding FIOMASK register (see
Mask register (FIOMASK, Port 0: FIO0MASK - 0x3FFF C010 and Port 1:FIO1MASK -
0x3FFF
Only pins masked with zeros in the Mask register (see
Mask register (FIOMASK, Port 0: FIO0MASK - 0x3FFF C010 and Port 1:FIO1MASK -
0x3FFF
register.
Table 77: GPIO port 0 Pin value register (IO0PIN - address 0xE002 8000) bit description
Bit Symbol Description
31:0 P0xVAL Slow GPIO pin value bits. Bit 0 in IO0PIN corresponds to P0.0 ... Bit 31 in IO0PIN
corresponds to P0.31.
Table 78: GPIO port 1 Pin value register (IO1PIN - address 0xE002 8010) bit description
Bit Symbol Description
31:0 P1xVAL Slow GPIO pin value bits. Bit 0 in IO1PIN corresponds to P1.0 ... Bit 31 in IO1PIN
corresponds to P1.31.
Table 79: Fast GPIO port 0 Pin value register (FIO0PIN - address 0x3FFF C014) bit description
Bit Symbol Description
31:0 FP0xVAL Fast GPIO pin value bits. Bit 0 in FIO0PIN corresponds to P0.0 ... Bit 31 in FIO0PIN
corresponds to P0.31.
Table 80: Fast GPIO port 1 Pin value register (FIO1PIN - address 0x3FFF C034) bit description
Bit Symbol Description
31:0 FP1xVAL Fast GPIO pin value bits. Bit 0 in FIO1PIN corresponds to P1.0 ... Bit 31 in FIO1PIN
corresponds to P1.31.
Aside from the 32-bit long and word only accessible FIOPIN register, every fast GPIO port
can also be controlled via several byte and half-word accessible registers listed in
Table 81
these additional registers allow easier and faster access to the physical port pins.
User manual
C030)").
C030)") will be correlated to the current content of the Fast GPIO port pin value
and Table 82, too. Next to providing the same functions as the FIOPIN register,
Rev. 01 — 15 August 2005
UM10139
Chapter 8: GPIO
Section 8.4.2 "Fast GPIO port
Section 8.4.2 "Fast GPIO port
Reset value
NA
Reset value
NA
Reset value
NA
Reset value
NA
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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