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Timer/Counter0 and Timer/Counter1 are functionally identical except for the peripheral
base address.
15.1 Features
15.2 Applications
15.3 Description
The Timer/Counter is designed to count cycles of the peripheral clock (PCLK) or an
externally-supplied clock, and can optionally generate interrupts or perform other actions
at specified timer values, based on four match registers. It also includes four capture
inputs to trap the timer value when an input signal transitions, optionally generating an
interrupt.
15.4 Pin description
Table 236
User manual
UM10139
Chapter 15: Timer/Counter TIMER0 and TIMER1
Rev. 01 — 15 August 2005
•
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
•
Counter or Timer operation
•
Up to four 32-bit capture channels per timer, that can take a snapshot of the timer
value when an input signal transitions. A capture event may also optionally generate
an interrupt.
•
Four 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
•
Up to four external outputs corresponding to match registers, with the following
capabilities:
– Set low on match.
– Set high on match.
– Toggle on match.
– Do nothing on match.
•
Interval Timer for counting internal events.
•
Pulse Width Demodulator via Capture inputs.
•
Free running timer.
gives a brief summary of each of the Timer/Counter related pins.
Rev. 01 — 15 August 2005
User manual
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
242
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