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Fig 33. Format of Master Receiver mode.
After a repeated START condition, I
S
SLA
from Master to Slave
from Slave to Master
Fig 34. A Master Receiver switches to Master Transmitter after sending Repeated Start.
12.6.3 Slave Receiver mode
In the Slave Receiver Mode, data bytes are received from a master transmitter. To
initialize the Slave Receiver Mode, the user should write the slave address to the Slave
Address Register (I2ADR) and the I
follows:
Table 82:
CRSEL is not used for slave mode. I2EN must be set = 1 to enable I
must be set = 1 to acknowledge its own slave address or the general call address. STA,
STO and SI are cleared to 0.
After I2ADR and I2CON are initialized, the interface waits until it is addressed by its own
address or general address followed by the data direction bit which is 0(W). If the direction
bit is 1(R), it will enter Slave Transmitter Mode. After the address and the direction bit have
been received, the SI bit is set and a valid status code can be read from the Status
Register(I2STAT). Refer to
User manual
S
slave address
from Master to Slave
from Slave to Master
R
A
DATA
A
logic 0 = write
data transferred
logic 1 = read
(n Bytes + acknowledge)
2
I
C Control register (I2CON - address D8h)
Bit
7
6
-
I2EN
value
-
1
Rev. 03 — 7 June 2005
R
A
DATA
logic 0 = write
data transferred
logic 1 = read
(n Bytes + acknowledge)
A = acknowledge (SDA LOW)
A = not acknowledge (SDA HIGH)
S = START condition
2
C-bus may switch to the Master Transmitter Mode.
DATA
A
RS
SLA
A = acknowledge (SDA LOW)
A = not acknowledge (SDA HIGH)
S = START condition
P = STOP condition
SLA = slave address
RS = repeat START condition
2
C Control Register (I2CON) should be configured as
5
4
3
STA
STO
SI
0
0
0
Table 86
for the status codes and actions.
UM10119
P89LPC938 User manual
A
DATA
A
P
002aaa930
W
A
DATA
A
P
002aaa931
2
1
AA
-
1
-
2
C function. AA bit
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
0
CRSEL
-
82 of 139
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