Rievtech xLogic ELC Series User Manual page 15

Note
xLogic CPU may be equipped with expansion modules of the different voltage class, but expansion
module must be supplied the correct power corresponding to its type.
Each xLogic CPU provides the following connections for the creation of the circuit program, regardless of
the number of connected blocks:
Digital inputs I1 to I4(PR-6), I1 to I8(PR-12), I1 to IC （ELC-18） ，I1 to IE(PR-24). I11-I18(Expansion

with address 1)...I161--I168(Expansion with address 16)
Analog inputs I1 to I6(PR-18/PR-24), I1 to I4(PR-12), I11 to I14(PR-E expansion with address

1),....AI161 to AI164(PR-E expansion with address 16)
Digital outputs Q1 to Q6（PR-18), Q1 to Q4(PR-12),Q1 to QA(PR-24);Q11 to Q18((PR-E expansion

with address 1), Q161 to Q168(PR-E expansion with address 16)
Digital flag blocks F1-F32(PR-6,PR-12-E), F1-F256(PR-12/PR-18/PR-24) ;

-F8 : Startup flag

-F64: Backlight control bit(to control the backlight of LCD and backlight of ELC-43TS)

-F63: Buzzer of ELC-43TS control bit

Analog flag blocks AF1 to AF256(PR-12/PR-18/PR-24);AF1-AF32(PR-6/PR-12-E)

Shift register bits S1 to S8

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