Assembler Format - Hitachi H8/300H Series Programming Manual

2.1.1 Assembler Format

Example: ADD. B <EAs>, Rd
Mnemonic
The operand size is byte (B), word (W), or longword (L). Some instructions are restricted to a
limited set of operand sizes.
The symbol <EA> indicates that two or more addressing modes can be used. The H8/300H CPU
supports the eight addressing modes listed next. Effective address calculation is described in
section 1.7, Effective Address Calculation.
Symbol
Rn
@ERn
@(d:16, ERn)/@(d:24, ERn)
@ERn+, @–ERn
@aa:8/16/24
#xx:8/16/32
@(d:8, PC)/@(d:16, PC)
@@aa:8
Destination operand
Source operand
Size
Addressing Mode
Register direct
Register indirect
Register indirect with displacement (16-bit or 24-bit)
Register indirect with post-increment or pre-decrement
Absolute address (8-bit, 16-bit, or 24-bit)
Immediate (8-bit, 16-bit, or 32-bit)
Program-counter relative (8-bit or 16-bit)
Memory indirect
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