Hitachi H8/300H Series Programming Manual page 12

The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions uses
an 8-bit absolute address to specify a memory operand that contains a branch address. In normal
mode the operand is a 16-bit word operand, providing a 16-bit branch address. Branch addresses
can be stored in the top area from H'0000 to H'00FF. Note that this area is also used for the
exception vector table.
Stack Structure: When the program counter (PC) is pushed on the stack in a subroutine call, and
the PC and condition-code register (CCR) are pushed on the stack in exception handling, they are
stored in the same way as in the H8/300 CPU. See figure 1-3.
(a) Subroutine branch
SP
Note: * Ignored at return.
H'0000
Reset exception vector
H'0001
H'0002
H'0003
Reserved for system use
H'0004
H'0005
H'0006
Exception vector 1
H'0007
H'0008
Exception vector 2
H'0009
Figure 1-2 Exception Vector Table (normal mode)
PC
(16 bits)
Figure 1-3 Stack Structure (normal mode)
(b) Exception handling
SP
4
Exception
vector table
CCR
CCR*
PC
(16 bits)