Bor - Hitachi H8/300H Series Programming Manual

2.2.16 BOR

BOR (bit inclusive OR)
Operation
C ∨ [(<bit No.> of <EAd>)] → C
Assembly-Language Format
BOR #xx:3, <EAd>
Operand Size
Byte
Description
This instruction ORs a specified bit in the destination operand with the carry bit and stores the
result in the carry bit. The bit number is specified by 3-bit immediate data. The destination
operand contents remain unchanged.
Specified by #xx:3
Bit No. 7
<EAd>
∨
C
Available Registers
Rd: R0L to R7L, R0H to R7H
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode*
Register direct BOR
Register indirect BOR
Absolute address BOR
Note: The addressing mode is the addressing mode of the destination operand <EAd>.
*
Notes
For the @aa:8 access range, refer to the relevant microcontroller hardware manual.
0
C
Operands
1st byte
#xx:3,Rd 7 4
#xx:3,@ERd 7 C
#xx:3,@aa:8 7 E
64
Condition Code
I UI H U
— — — — — — —
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Stores the result of the operation.
Instruction Format
2nd byte 3rd byte
0 IMM rd
0 erd 0 7
abs 7
Bit Logical OR
N Z V C
No. of
States
4th byte
2
4 0 IMM 0 6
4 0 IMM 0 6