3) Xor (L) - Hitachi H8/300H Series Programming Manual

2.2.63 (3) XOR (L)

XOR (eXclusive OR logical)
Operation
ERd ⊕ (EAs) → ERd
Assembly-Language Format
XOR.L <EAs>, ERd
Operand Size
Longword
Description
This instruction exclusively ORs the source operand with the contents of a 32-bit register ERd
(destination register) and stores the result in the 32-bit register ERd.
Available Registers
ERd: ER0 to ER7
ERs: ER0 to ER7
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode
Immediate XOR.L
Register direct XOR.L
Notes
Operands
1st byte 2nd byte
#xx:32, ERd 7 A 5
ERs, ERd 0 1 F
Condition Code
I UI H
— — — —
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
cleared to 0.
Z: Set to 1 if the result is zero; otherwise
cleared to 0.
V: Always cleared to 0.
C: Previous value remains unchanged.
Instruction Format
3rd byte 4th byte
0 erd
0 6 5 0 ers 0 erd
185
Exclusive Logical OR
U N Z V C
0 —
No. of
States
5th byte 6th byte
IMM 6
4