3) Sub (L) - Hitachi H8/300H Series Programming Manual

2.2.59 (3) SUB (L)

SUB (SUBtract binary)
Operation
ERd – <EAs> → ERd
Assembly-Language Format
SUB.L <EAs>, ERd
Operand Size
Longword
Description
This instruction subtracts a source operand from the contents of a 32-bit register ERd (destination
operand) and stores the result in the 32-bit register ERd.
Available Registers
ERd: ER0 to ER7
ERs: ER0 to ER7
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode
Immediate SUB.L
Register direct SUB.L
Notes
Operands
1st byte 2nd byte
#xx:32, ERd 7 A 3
ERs, ERd 1 A 1 ers 0 erd
Condition Code
I UI H
— —
H: Set to 1 if there is a borrow at bit 27;
otherwise cleared to 0.
N: Set to 1 if the result is negative; otherwise
cleared to 0.
Z: Set to 1 if the result is zero; otherwise
cleared to 0.
V: Set to 1 if an overflow occurs; otherwise
cleared to 0.
C: Set to 1 if there is a borrow at bit 31;
otherwise cleared to 0.
Instruction Format
3rd byte 4th byte
0 erd
179
Subtract Binary
U N Z V C
—
No. of
States
5th byte 6th byte
IMM 6
2