Hitachi H8/300H Series Programming Manual page 228

Table 2-8 Number of Cycles in Instruction Execution (cont)
Instruction Mnemonic
SHLL SHLL.B Rd
SHLL.W Rd
SHLL.L ERd
SHLR SHLR.B Rd
SHLR.W Rd
SHLR.L ERd
SLEEP SLEEP
STC STC CCR,Rd
STC CCR,@ERd
STC CCR,@(d:16,ERd)
STC CCR,@(d:24,ERd)
STC CCR,@–ERd
STC CCR,@aa:16
STC CCR,@aa:24
SUB SUB.B Rs,Rd
SUB.W #xx:16,Rd
SUB.W Rs,Rd
SUB.L #xx:32,ERd
SUB.L ERs,ERd
SUBS SUBS #1/2/4,ERd
SUBX SUBX #xx:8,Rd
SUBX Rs,Rd
TRAPA TRAPA #x:2
XOR XOR.B #xx:8,Rd
XOR.B Rs,Rd
XOR.W #xx:16,Rd
XOR.W Rs,Rd
XOR.L #xx:32,ERd
XOR.L ERs,ERd
XORC XORC #xx:8,CCR
Instruction
Fetch
I
1
1
1
1
1
1
1
1
2
3
5
2
3
4
1
2
1
3
1
1
1
1
Advanced 2
Normal 2
1
1
2
1
3
2
1
Branch
Address Stack
Read Operation
J K
2 2
1 2
220
Byte Data Word Data Internal
Access Access
L M
1
1
1
1
1
1
Operation
N
2
4
4